Semiconductors
NVIDIA is deploying its Vera CPU to accelerate Electronic Design Automation (EDA), significantly reducing the time required to design the next generation of complex AI chips.
Semiconductors
NVIDIA is utilizing its high-performance Vera CPUs to accelerate the design of the next generation of chips. This 'AI designing AI' loop is essential for managing the skyrocketing complexity of modern semiconductors.
Semiconductors
The semiconductor industry is moving toward High-NA EUV lithography and 3D mask effects to continue the march toward 2nm and below. Simultaneously, new research into Graph Transformers is speeding up signal integrity analysis for complex IC interconnects by orders of magnitude.
Semiconductors
As chip architectures move toward chiplets and 3D stacking, verifying Networks on Chip (NoC) has become a major industry chokepoint. New verification methodologies are essential for the next generation of AI and server chips.
Semiconductors
As chip fabrication moves toward sub-2nm nodes, the industry is shifting focus to Backside Power Networks (BSPDN) and Nano-TSVs. Optimizing these connections is critical for maintaining power integrity and reducing resistance in the high-density processors required for AI.
Semiconductors
SK hynix has introduced StreamDQ, a near-memory dequantization architecture designed to accelerate LLM inference. By performing weight dequantization directly in HBM, the system reduces data transfer bottlenecks and improves energy efficiency.
Semiconductors
NVIDIA’s new Vera CPU architecture targets 'agentic AI,' focusing on single-threaded performance at scale. This new category of silicon is designed to handle the reasoning and planning tasks required by physical AI systems.
Semiconductors
Researchers are leveraging LLM-based agents to automate the refactoring of software for High-Level Synthesis (HLS). This 'self-evolving' workflow promises to bridge the gap between high-level code and hardware-optimized semiconductor design.
Semiconductors
The semiconductor industry is facing critical I/O design challenges as AI data centers and HPC clusters grow. Engineers are grappling with bandwidth chokepoints that threaten to stall the progress of large-scale AI training.
Semiconductors
Intel’s 18A process node is gaining significant momentum, with the company showcasing new breakthroughs in backside power delivery and routed designs. These innovations are critical for the next generation of AI and automotive chips that require unprecedented power efficiency.
Semiconductors
NVIDIA's Blackwell architecture has dominated the latest MLPerf Training 6.0 benchmarks, setting new records for AI training speed and efficiency. This hardware serves as the silicon foundation for the next generation of physical and agentic AI.
Semiconductors
Researchers from imec and KAIST are pushing the boundaries of AI hardware. New 3D heterogeneous memories using IGZO FeFETs and reconfigurable hardware for Zero-Knowledge Proofs are set to redefine chip efficiency.