AgRefactor: Using AI Agents to Accelerate Semiconductor Design Cycles
Researchers are leveraging LLM-based agents to automate the refactoring of software for High-Level Synthesis (HLS). This 'self-evolving' workflow promises to bridge the gap between high-level code and hardware-optimized semiconductor design.
The design cycle for new semiconductors is notoriously slow, often hampered by the difficulty of translating high-level software code into hardware-efficient descriptions. Researchers from Carnegie Mellon and UCLA are now using Large Language Models (LLMs) to automate this process. Their new framework, "AgRefactor," uses an agentic workflow to refactor software for High-Level Synthesis (HLS) compatibility.
HLS is a critical step in modern chip design, allowing engineers to create hardware architectures using languages like C or C++. However, code that runs well on a CPU is often inefficient for specialized hardware. AgRefactor acts as an automated architect, identifying bottlenecks in the code and rewriting it to optimize for FPGA or ASIC performance. It doesn't just make the code work; it makes it "hardware-aware."
This breakthrough could significantly lower the barrier to entry for custom silicon. As AI models become more specialized, the need for bespoke hardware grows. By using AI to design AI chips, the semiconductor industry is entering a "self-evolving" loop that could drastically pick up the pace of innovation, reducing the time from architectural concept to physical silicon.
Source: Semiconductor Engineering
